Image AD9833
型号: AD9833
厂商: Analog Devices Inc Analog Devices Inc
分类: 半导体
描述: +2.5 V to +5.5 V, 25 mhz low power cmos complete dds
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PRELIMINARY TECHNICAL DATA  
+2.5 V to +5.5 V, 25 MHz Low Power  
a
Preliminary Technical Data  
CMOSCompleteDDS  
AD9833  
with a power supply from +2.3 V to +5.5 V.  
FEATURES  
+2.3 V to +5.5 V Power Supply  
25 MHz Speed  
Tiny 10-Pin µSOIC Package  
Serial Loading  
Sinusoidal/Triangular DAC Output  
Power-Down Option  
Narrowband SFDR > 72 dB  
20 mW Power Consumption at 3 V  
Capability for phase modulation and frequency modula-  
tion is provided. Frequency accuracy can be controlled to  
one part in 0.25 billion. Modulation is effected by loading  
registers through the serial interface.  
The AD9833 offers a variety of output waveforms from  
the VOUT pin. The SIN ROM can be bypassed so that a  
linear up/down ramp is output from the DAC. If the SIN  
ROM is not by-passed, a sinusoidal output is available.  
Also, if a clock output is required, the MSB of the DAC  
data can be output.  
APPLICATIONS  
Digital Modulation  
Portable Equipment  
Test Equipment  
DDS Tuning  
The digital section is internally operated at +2.5 V, irre-  
spective of the value of VDD, by an on board regulator  
which steps down VDD to +2.5 V, when VDD exceeds  
+2.5 V.  
The AD9833 has a power-down function (SLEEP). This  
allows sections of the device which are not being used to  
be powered down, thus minimising the current consump-  
tion of the part e.g the DAC can be powered down when a  
clock output is being generated.  
GENERAL DESCRIPTION  
This low power DDS device is a numerically controlled  
oscillator employing a phase accumulator, a SIN ROM  
and a 10-bit D/A converter integrated on a single  
CMOS chip. Clock rates up to 25 MHz are supported  
The AD9833 is available in a 10-pin µSOIC package.  
FUNCTIONAL BLOCK DIAGRAM  
CAP/2.5V  
VDD  
DGND  
AGND  
MCLK  
On-Board  
Reference  
Regulator  
2.5V  
AVDD/  
DVDD  
FullScale  
Control  
COMP  
FREQ0 REG  
FREQ1 REG  
12  
Phase  
Accumulator  
(28 Bit)  
SIN  
ROM  
10-Bit DAC  
MUX  
Σ
MUX  
MSB  
PHASE0 REG  
PHASE1 REG  
MUX  
DIV BY  
2
MUX  
VOUT  
Control Register  
R
200  
Serial Interface  
&
AD9833  
Control Logic  
FSYNC  
SCLK  
SDATA  
REV PrG 02/02  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106,U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2002  

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