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Texas Instruments 
Datasheet下载地址
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ADS61B29IRGZT的详细信息
| Manufacturer： | Texas Instruments |
|---|---|
| Product Category： | Analog to Digital Converters - ADC |
| RoHS： | Yes |
| Number of Channels： | 1 Channel |
| Brand： | Texas Instruments |
| Architecture： | Pipeline |
| Conversion Rate： | 250000 kS/s |
| Resolution： | 12 bit |
| Input Type： | Differential |
| Interface Type： | LVDS, Parallel |
| Operating Supply Voltage： | 1.7 V to 1.9 V, 3 V to 3.6 V |
| Maximum Operating Temperature： | + 85 C |
| Mounting Style： | SMD/SMT |
| Package / Case： | VQFN-48 |
| Maximum Power Dissipation： | 730 mW |
| Minimum Operating Temperature： | - 40 C |
| Number of Converters： | 1 |
| Packaging： | Reel |
| Series： | ADS61B29 |
| SNR： | 70.1 dB |
| Factory Pack Quantity： | 250 |
| Voltage Reference： | Internal, External |
| Unit Weight： | 138 mg |
ADS61B29IRGZT相关文档
- PCN : Qualification of RFAB as an additional FAB site option for selected devices in the C05 process
- PCN: Conversion to smaller reel (13" to 7") and associated packing materials on Selected QFN Devices currently shipped in 13 reels
- Evaluation Kits: ADS61B29 Evaluation Module
- Evaluation Kits: Low Cost Data Capture Card
- Evaluation Kits: ADS61B49 Evaluation Module
- Evaluation Kits: TSW2200EVM: Low Cost Portable Power Supply
- Function Diagram: fbd_slws214b
ADS61B29IRGZT应用笔记
- Analog-to-Digital Converter Grounding Practices Affect System Performance
- Interleaving Analog-to-Digital Converters
- CDCE62005 as Clock Solution for High-Speed ADCs
- What Designers Should Know About Data Converter Drift
- CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
- Shelf-Life Evaluation of Lead-Free Component Finishes
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
- Driving High-Speed ADCs: Circuit Topologies and System-Level Parameter (Rev. A)
- Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
- Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
- QFN Layout Guidelines
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat
- Principles of Data Acquisition and Conversion
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