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Texas Instruments 
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TMS320C6678ACYPA25的详细信息
| Manufacturer： | Texas Instruments |
|---|---|
| Product Category： | Digital Signal Processors & Controllers - DSP, DSC |
| RoHS： | Yes |
| Core： | TMS320C6678 |
| Data Bus Width： | 8/16/32 bit |
| Program Memory Size： | 32 kB |
| Data RAM Size： | 4 kB |
| Maximum Clock Frequency： | 1.25 GHz |
| Number of Programmable I/Os： | 16 |
| Number of Timers： | 16 |
| Operating Supply Voltage： | 0.95 V to 1.05 V |
| Maximum Operating Temperature： | + 85 C |
| Package / Case： | FCBGA-841 |
| Mounting Style： | SMD/SMT |
| Brand： | Texas Instruments |
| Instruction Type： | Fixed/Floating Point |
| Interface Type： | I2C, UART |
| Minimum Operating Temperature： | 0 C |
| On-Chip ADC： | No |
| Processor Series： | TMS320C6678 |
| Product： | DSPs |
| Program Memory Type： | Cache |
| Series： | TMS320C6678 |
| Factory Pack Quantity： | 44 |
| Supply Current： | 1.05 V |
| Supply Voltage - Min： | 0.95 V |
| Tradename： | C6000 |
TMS320C6678ACYPA25相关文档
- Evaluation Kits: AMC to PCIe Adapter Card
- Evaluation Kits: XDS560 High Performance Debug Probe
- Evaluation Kits: Hyperlink Cable
- Evaluation Kits: XDS100 Low-cost Debug Probe
- Evaluation Kits: TMS320C6678 Evaluation Modules
- Evaluation Kits: Power Management for C667x DSP AVS Core (CVDD)
- Evaluation Kits: XDS200 Price/Performance-balanced Debug Probe
- Function Diagram: fbd_SPRS691e
- Evaluation Kits: Power Management for C667x DSP AVS Core (CVDD)
- Evaluation Kits: Power Solution for C667x DSP AVS Core (CVDD) with Dynamic Volltage Scaling
TMS320C6678ACYPA25应用笔记
- Thermal Design Guide for KeyStone Devices
- DDR3 Design Requirements for KeyStone Devices (Rev. A)
- KeyStone DDR3 Initialization (Rev. B)
- SerDes Implementation Guidelines for KeyStone I Devices
- The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
- PCIe Use Cases for KeyStone Devices
- Multicore Programming Guide (Rev. B)
- Throughput Performance Guide for C66x KeyStone Devices (Rev. A)
- Clocking Design Guide for KeyStone Devices
- TMS320C66x DSP Generation of Devices (Rev. A)
- Optimizing Loops on the C66x DSP
- Hardware Design Guide for KeyStone Devices (Rev. C)
- DDR3 Design Requirements for KeyStone Devices (Rev. B)
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