厂商ON Semiconductor 74LS74 数据手册，datasheet pdf下载

型号：	74LS74
厂商：	ON Semiconductor
描述：	low power schottky
PDF：	预览
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The SN74LS74A dual edge-triggered flip-flop utilizes Schottky

TTL circuitry to produce high speed D-type flip-flops. Each flip-flop

has individual clear and set inputs, and also complementary Q and Q

outputs.

http://onsemi.com

Information at input D is transferred to the Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a

voltage level of the clock pulse and is not directly related to the

transition time of the positive-going pulse. When the clock input is at

either the HIGH or the LOW level, the D input signal has no effect.

LOW

POWER

SCHOTTKY

MODE SELECT – TRUTH TABLE

INPUTS

OUTPUTS

OPERATING MODE

Set

Reset (Clear)

*Undetermined

Load “1” (Set)

Load “0” (Reset)

PLASTIC

N SUFFIX

CASE 646

Both outputs will be HIGH while both S and C are LOW, but the output

D D

states are unpredictable if S and C go HIGH simultaneously. If the levels

at the set and clear are near V maximum then we cannot guarantee to meet

the minimum level for V

H, h = HIGH Voltage Level

L, I = LOW Voltage Level

X = Don’t Care

l, h (q) = Lower case letters indicate the state of the referenced input

SOIC

D SUFFIX

CASE 751A

i, h (q) = (or output) one set-up time prior to the HIGH to LOW clock transition.

ORDERING INFORMATION

GUARANTEED OPERATING RANGES

Symbol

Parameter

Supply Voltage

Min

4.75

Typ

5.0

Max

5.25

Unit

Device

Package

14 Pin DIP

14 Pin

Shipping

SN74LS74AN

SN74LS74AD

2000 Units/Box

Operating Ambient

Temperature Range

°C

2500/Tape & Reel

Output Current – High

Output Current – Low

–0.4

8.0



Semiconductor Components Industries, LLC, 1999

Publication Order Number:

December, 1999 – Rev. 6

SN74LS74A/D