厂商Atmel 集成电路集成电路 AT89S52 数据手册，datasheet pdf下载

型号：	AT89S52
厂商：	Atmel
分类：	集成电路
描述：	8-bit microcontroller with 8K bytes In-system programmable flash
PDF：	预览
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Features

• Compatible with MCS-51^®Products

• 8K Bytes of In-System Programmable (ISP) Flash Memory

– Endurance: 1000 Write/Erase Cycles

• 4.0V to 5.5V Operating Range

• Fully Static Operation: 0 Hz to 33 MHz

• Three-level Program Memory Lock

• 256 x 8-bit Internal RAM

• 32 Programmable I/O Lines

• Three 16-bit Timer/Counters

• Eight Interrupt Sources

• Full Duplex UART Serial Channel

• Low-power Idle and Power-down Modes

• Interrupt Recovery from Power-down Mode

• Watchdog Timer

8-bit

Microcontroller

with 8K Bytes

In-System

Programmable

Flash

• Dual Data Pointer

• Power-off Flag

Description

The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K

bytes of in-system programmable Flash memory. The device is manufactured using

Atmel’s high-density nonvolatile memory technology and is compatible with the indus-

try-standard 80C51 instruction set and pinout. The on-chip Flash allows the program

memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-

grammer. By combining a versatile 8-bit CPU with in-system programmable Flash on

a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a

highly-flexible and cost-effective solution to many embedded control applications.

AT89S52

The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes

of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a

six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator,

and clock circuitry. In addition, the AT89S52 is designed with static logic for operation

down to zero frequency and supports two software selectable power saving modes.

The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and

interrupt system to continue functioning. The Power-down mode saves the RAM con-

tents but freezes the oscillator, disabling all other chip functions until the next interrupt

or hardware reset.

Rev. 1919A-07/01

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