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| 型号： | DAC5687IPZPR |
| 厂商： |
 Texas Instruments |
| 标准： |   |
| 分类： | 半导体 ， 集成电路 - IC |
| 描述： | digital to analog converters - dac 16-bit 500 msps 2-8x interpolat'g dual-Ch |
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Datasheet下载地址
| 本地下载 >> 厂商下载2 >> 第三方平台下载 >> |
DAC5687IPZPR的详细信息
| Manufacturer： | Texas Instruments |
|---|---|
| Product Category： | Digital to Analog Converters - DAC |
| RoHS： | Yes |
| Architecture： | Current Steering |
| Number of Converters： | 2 |
| Resolution： | 16 bit |
| Interface Type： | Parallel |
| Settling Time： | 10.4 ns |
| Maximum Operating Temperature： | + 85 C |
| Mounting Style： | SMD/SMT |
| Package / Case： | HTQFP-100 |
| Packaging： | Reel |
| Brand： | Texas Instruments |
| Development Kit： | DAC5687EVM |
| Integral Nonlinearity： | +/- 4 LSB |
| Minimum Operating Temperature： | - 40 C |
| Output Type： | Parallel |
| Sampling Rate： | 500 MSPs |
| Series： | DAC5687 |
| Factory Pack Quantity： | 1000 |
| Supply Voltage - Max： | 3.6 V |
| Supply Voltage - Min： | 3 V |
| Voltage Reference： | Internal or External |
| Unit Weight： | 505.400 mg |
DAC5687IPZPR相关文档
- PCN : Qualification of RFAB as an additional FAB site option for selected devices in the C05 process
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- Function Diagram: fbd_slws164e
DAC5687IPZPR应用笔记
- Shelf-Life Evaluation of Lead-Free Component Finishes
- CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
- Superposition: The Hidden DAC Linearity Error
- What Designers Should Know About Data Converter Drift
- Passive Terminations for Current Output DACs
- DAC5686/DAC5687 Clock Generation Using PLL & External Clock Modes (Rev. A)
- Q3 2009 Issue Analog Applications Journal
- Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
- High Speed, Digital-to-Analog Converters Basics (Rev. A)
- Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs
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