Image LF398
型号: LF398
厂商: Texas Instruments Texas Instruments
分类: 集成电路
描述: monolithic sample-and-hold circuits
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July 2000  
LF198/LF298/LF398, LF198A/LF398A  
Monolithic Sample-and-Hold Circuits  
General Description  
n Operates from 5V to 18V supplies  
n Less than 10 µs acquisition time  
n TTL, PMOS, CMOS compatible logic input  
n 0.5 mV typical hold step at Ch = 0.01 µF  
n Low input offset  
The LF198/LF298/LF398 are monolithic sample-and-hold  
circuits which utilize BI-FET technology to obtain ultra-high  
dc accuracy with fast acquisition of signal and low droop  
rate. Operating as a unity gain follower, dc gain accuracy is  
0.002% typical and acquisition time is as low as 6 µs to  
0.01%. A bipolar input stage is used to achieve low offset  
voltage and wide bandwidth. Input offset adjust is accom-  
plished with a single pin, and does not degrade input offset  
drift. The wide bandwidth allows the LF198 to be included in-  
side the feedback loop of 1 MHz op amps without having sta-  
bility problems. Input impedance of 1010allows high  
source impedances to be used without degrading accuracy.  
n 0.002% gain accuracy  
n Low output noise in hold mode  
n Input characteristics do not change during hold mode  
n High supply rejection ratio in sample or hold  
n Wide bandwidth  
n Space qualified, JM38510  
P-channel junction FET’s are combined with bipolar devices  
in the output amplifier to give droop rates as low as 5 mV/min  
with a 1 µF hold capacitor. The JFET’s have much lower  
noise than MOS devices used in previous designs and do  
not exhibit high temperature instabilities. The overall design  
guarantees no feed-through from input to output in the hold  
mode, even for input signals equal to the supply voltages.  
Logic inputs on the LF198 are fully differential with low input  
current, allowing direct connection to TTL, PMOS, and  
CMOS. Differential threshold is 1.4V. The LF198 will operate  
from 5V to 18V supplies.  
An “A” version is available with tightened electrical  
Typical Connection and Performance Curve  
Acquisition Time  
Functional Diagram  
© 2000 National Semiconductor Corporation