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Release Date:
July, 2002
ds_pl2303_v14
Revision History
Revision
Description
Date
1.4
1.3
August 29, 2002
August 01, 2002
•
•
Add Windows CE .NET support feature
Buffer for upstream and downstream data flow –
change from 96 to 256 bytes
1.2
July 03, 2002
•
•
•
For Chip Version H (date code 0206)
Add OS Support in Features Section
Correct default values in Table 5. Device
Configuration Register
•
•
Add Suspend Current in DC Characteristics Section
Move Operating Temperature in DC Characteristics
to new section
PL-2303 Product Datasheet
- 2 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
PL-2303 USB to Serial RS232 Bridge Controller
Features
ꢀ
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ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Full compliance with the USB Specification v1.1 and USB CDC v1.1
Support the RS232 Serial interface
Support automatic handshake mode
Support Remote wake-up and power management
256 bytes buffer each for upstream and downstream data flow
Support default ROM or external EEPROM for device configuration
On chip USB transceiver
On chip crystal oscillator running at 12M Hz
Supports Windows 98/SE, ME, 2000, XP, Windows CE3.0, CE .NET, Linux, and Mac OS
28 Pins SOIC package
SSOP 28 PACKAGE
(TOP VIEW)
TXD
DTR_N
RTS_N
VDD_232
RXD
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OSC2
2
OSC1
3
PLL_TEST
GND_PLL
4
5
VDD_PLL
LD_MODE
TRI_MODE
RI_N
6
GND
7
VDD
8
GND
DSR_N
DCD_N
CTS_N
SHTD_N
EE_CLK
EE_DATA
9
VDD
10
11
12
13
14
RESET
GND_3V3
VDD_3V3
DM
DP
PL-2303 Product Datasheet
- 3 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
Block Diagram
USB Port
USB
Transceiver
REGISTER/
CONFIG/
STATUS/
Control
Unit
USB
SIE
CONTROL
DOWN
STREAM
BUFFER
UP
STREAM
BUFFER
CLOCK
SYNTHESIZE
RS-232 SERIAL
INTERFACE
EEPROM
INTERFACE
OSCILLATOR
Serial Port
I2C Bus
PL-2303 Product Datasheet
- 4 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
Overview
The PL-2303 operates as a bridge between one USB port and one standard RS232 Serial port. The two
large on-chip buffers accommodate data flow from two different buses. The USB bulk-type data is adopted
for maximum data transfer. Automatic handshake is supported at the Serial port. With these, a much higher
baud rate can be achieved compared to the legacy UART controller.
This device is also compliant with USB power management and remote wakeup scheme. Only minimum
power is consumed from the host during Suspend. By integrating all the function in a SOIC-28 package, this
chip is suitable for cable embedding. Users just simply hook the cable into PC or hub’s USB port, and then
they can connect to any RS-232 devices.
Pin Description
Table 1. Pins Description
Pin
No.
Name
TXD
DTR_N
RTS_N
Type
Description
1
2
3
4
O
O
O
P
Data output to Serial port
Data Terminal Ready, active low
Request To Send, active low
RS-232 VDD. The RS-232 output signals (Pin 1 ~ Pin 3) are
designed for 5V, 3.3V or 3V operation. VDD_232 should be
connected to the same power level of the RS-232 interface.
(The RS-232 input signals are always 5V~3V tolerant.)
Note: This document version only provides 5V DC characteristic
information. Refer to future revisions for updates.
VDD_232
5
6
7
8
9
10
11
12
13
RXD
RI_N
GND
VDD
DSR_N
DCD_N
CTS_N
SHTD_N
EE_CLK
I
I
P
P
I
I
I
Data input from Serial Bus
Ring Indicator, active low
Ground
Power
Data Set Ready, active low
Data Carrier Detect, active low
Clear To Send, active low
Shut Down RS232 Transceiver
O
I/O
During Reset, this pin is input for simulation purpose. During
normal operation, this pin is Serial ROM clock
14
15
16
17
18
19
20
21
EE_DATA
DP
DM
VDD_3V3
GND_3V3
RESET
VDD
I/O
I/O
I/O
P
P
I
Serial ROM data signal
USB DPLUS signal
USB DMINUS signal
3.3V power for USB transceiver
3.3V ground
System Reset
Power
P
P
GND
Ground
PL-2303 Product Datasheet
- 5 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
Pin
No.
Name
Type
Description
22
TRI_STATE
I
Tri-State
This pin is referred after reset.
High: RS-232 output inactive during Suspend.
Low: RS-232 output tri-state during Suspend.
Load Mode/SHTD
This pin is input during reset. Pull high with a 220K resistor to
indicate the heavy load USB device (500mA). Pull down with a
220K resistor to indicate the light load USB device 100mA).
23
LD_MD/
SHTD
I/O
After reset, this pin becomes output. It output the inverse of
SHTD_N.
5V power for PLL
24
25
26
27
28
VDD_PLL
GND_PLL
PLL_TEST
OSC1
P
P
I
I
O
Ground for PLL
PLL test mode control
Crystal oscillator input
Crystal oscillator output
OSC2
Type: I – Input signal
O – Output signal
I/O – Bi-directional signal
P – Power/Ground
Supported Data Formats and Programmable Baud Rate Generator
The PL2303 USB-to-RS232 bridge controller supports versatile data formats and has a programmable baud
rate generator. The supported data formats are shown on Table 2. The programmable baud rate generator
supports baud rates up to 1.2M bps as shown in Table 3.
Table 2. Supported Data Formats
Description
Stop bits
1
1.5
2
Parity type
None
Odd
Even
Mark
Space
Data bits
5, 6, 7, 8, or 16
PL-2303 Product Datasheet
- 6 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
Table 3. Baud Rate Setting
dwDTERate
Baud Rate
1228800
921600
614400
460800
230400
115200
57600
38400
28800
19200
14400
9600
0012C000h
000E1000h
00096000h
00070800h
00038400h
0001C200h
0000E100h
00009600h
00007080h
00004B00h
00003840h
00002580h
00001C20h
000012C0h
00000E10h
00000960h
00000708h
000004B0h
00000258h
0000012Ch
00000096h
0000004Bh
7200
4800
3600
2400
1800
1200
600
300
150
75
External EEPROM and Device Configuration
PL-2303 allows storing the configuration data in an external EEPROM. After reset, the first two bytes of
EEPROM are checked. If the value is 067Bh, the EEPROM is valid and the contents of the EEPROM are
loaded as the chip’s default parameters. Otherwise, the chip’s default setting is used. The content of
EEPROM is shown in Table 4 below.
The Device Configuration Register is used to control some vendor-specific functions. The meaning of each
bit in Device Configuration Register is shown in Table 5. Reserved and unused pins always set to the default
value.
Table 4. EEPROM Content
Bytes
Name
Description
1:0
EECHK
When the EEPROM is programmed, these two bytes is configured as 067B.
After reset, they will be checked for the value. If matched, the following
information will be loaded as the default parameters.
3:2
5:4
7:6
VID
PID
RN
USB Vendor ID
Product ID
Release number (BCD)
Device Configuration Register
10:8
DCR
PL-2303 Product Datasheet
- 7 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
Table 5. Device Configuration Register
Name
23
22
Bits
RESERVED
TRI_OUT
Definition
Default
Reserved
0
0
RS-232 Output Tri-state:
1: RS-232 output tri-state
0: RS-232 output in output mode
Remote Wakeup Mode:
21
RW_MODE
1
0: When engages remote wakeup, the device issues disconnect
signal
1: When engages remote wakeup, the device issues resume
signal
Enable Wake Up Trigger on RXD:
0 – Disabled;
1 – Enable Wake Up Trigger on RXD state changes.
Enable Wake Up Trigger on DSR:
0 – Disabled;
1 – Enable Wake Up Trigger on DSR state changes.
Enable Wake Up Trigger on RI:
0 – Disabled;
1 – Enable Wake Up Trigger on RI state changes.
Enable Wake Up Trigger on DCD:
0 – Disabled;
1 – Enable Wake Up Trigger on DCD state changes.
Enable Wake Up Trigger on CTS:
0 – Disabled;
20
19
18
17
16
WURX
0
0
1
0
0
WUDSR
WURI
WUDCD
WUCTS
1 – Enable Wake Up Trigger on CTS state changes.
Always set to one
Always set to zero
Always set to zero
Remote Wake Inhibit:
15
14
13
12
RESERVED
RESERVED
RESERVED
RW_INH
1
0
0
0
1 – Inhibit the USB Remote Wakeup function
0 – Enable the USB Remote Wakeup function
Always set to zero
11:6
5:4
RESERVED
RTSM
0
0
RTS Control Method:
00b – RTS is controlled by ControlBitMap. Signal is active low;
01 – RTS is controlled by ControlBitMap. Signal is active high;
10 – Drive RTS active when Downstream Data Buffer is NOT
EMPTY; otherwise Drive RTS inactive.
11 – Drive RTS inactive when Downstream Data Buffer is NOT
EMPTY; otherwise Drive RTS active.
Always set to zero
RS-232 Transceiver Shut-Down Mode:
1: Shut down the transceiver when USB SUSPEND is engaged
3:1
0
RESERVED
RSPDM
0
1
0: Do not shut down the transceiver even when USB SUSPEND
is engaged
PL-2303 Product Datasheet
- 8 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
Electrical Characteristics
Absolute Maximum Ratings
Item
Ratings
-0.3 to 6.0 V
-0.3 to VDD+0.3 V
Power Supply Voltage
Input Voltage
Output Voltage
Storage Temperature
-0.3 to VDD+0.3 V
-55 to 150 oC
DC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Power Supply Current
Input Voltage
IDD
0.5
19
24
mA
Low
VIL
VIH
--
--
--
0.3* VDD
--
V
V
High
0.7* VDD
Output Voltage
Low
VOL
VOH
--
--
--
0.4
--
V
V
High
3.5
Schmitt Trigger Threshold Voltage*1
Negative going
Positive going
Vt-
Vt+
--
--
1.10
1.87
--
--
V
V
Output Voltage, 3.3V*2
Low
VOL
VOH
IL
--
2.4
-1
-10
--
--
--
--
--
--
--
3
3
3
5
400
0.4
--
1
10
--
--
--
5.25
490
V
V
High
Input Leakage Current
Tri-state Leakage Current
Input Capacitance
Output Capacitance
Bi-directional Buffer Capacitance
Operating Voltage Range
Suspend Current
uA
uA
Pf
Pf
Pf
V
Ioz
CIN
COUT
CBID
--
4.75
--
ISUS
uA
*1. RS232 pins RXD_I, RI_I, DSR_I, DCD_I, CTS_I are 5V TTL Schmitt Trigger inputs.
*2. RS232 pins TXD, DTR_N, RTS_N are 3.3V tri-state outputs.
Temperature Characteristics
Parameter
Symbol
Min
-40
0
Typ
--
25
Max
85
115
Units
oC
Operating Temperature
Junction Operation Temperature
--
TJ
oC
PL-2303 Product Datasheet
- 9 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
USB Transceiver Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Rise and Fall Times:
(10%―90%)
TR
TF
4
4
8
8
15
15
ns
ns
(90%―10%)
Cross Point
VCR
RD
VOH
VOL
VIH
VIL
1.3
23
2.8
--
2.0
--
--
28
--
--
--
2.0
33
--
0.7
--
V
ohm
V
V
V
Output Impedance
High Level Output
Low Level Output
High Level Input
Low Level Input
--
0.8
V
•
CL: 50pf
Clock Characteristics
Parameter
Frequency of Operation
Clock Period
Min
11.976
83.1
45
Typ
12.000
83.3
50
Max
Units
MHz
ns
12.024
83.5
55
Duty Cycle
%
Package Dimensions (28-Pin SSOP)
Symbol
Millimeters
Nom
Inch
Min
0.22
7.40
5.00
0.55
0.09
9.9
Max
0.38
8.20
5.60
0.95
Min
Nom
Max
0.015
0.323
0.220
0.037
b
E
E1
L
R1
D
A
0.009
0.291
0.197
0.021
0.004
0.390
7.80
5.30
0.75
0.307
0.209
0.030
10.2
10.5
2.0
0.402
0.413
0.079
e
0.65
1.25
0.0256
0.050
L1
A1
A2
0.05
1.65
0.020
0.065
1.75
1.85
0.069
0.073
PL-2303 Product Datasheet
- 10 -
Document Revision 1.3
Release Date:
July, 2002
ds_pl2303_v14
Outline Diagram
D
28
DETAIL A
E
E1
1
DETAIL A
A2
A
R1
A1
e
b
0.25
L
R1
L1
PL-2303 Product Datasheet
- 11 -
Document Revision 1.3
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