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| 型号： | SN74LVC2G157DCTR |
| 厂商： |
 Texas Instruments |
| 标准： |   |
| 分类： | 半导体 ， 集成电路 - IC |
| 描述： | encoders, decoders, multiplexers & Demultiplexers single line data |
| 报错 收藏 赞 | |
Datasheet下载地址
| 本地下载 >> 厂商下载2 >> 第三方平台下载 >> |
SN74LVC2G157DCTR的详细信息
| Manufacturer： | Texas Instruments |
|---|---|
| Product Category： | Encoders, Decoders, Multiplexers & Demultiplexers |
| RoHS： | Yes |
| Brand： | Texas Instruments |
| Product： | Selectors / Multiplexers |
| Logic Family： | LVC |
| Number of Input Lines： | 2 |
| Number of Output Lines： | 1 |
| Propagation Delay Time： | 4 ns |
| Supply Voltage - Max： | 5.5 V |
| Supply Voltage - Min： | 1.65 V |
| Maximum Operating Temperature： | + 85 C |
| Mounting Style： | SMD/SMT |
| Package / Case： | SSOP-8 |
| Packaging： | Reel |
| Minimum Operating Temperature： | - 40 C |
| Number of Lines In/Out： | 2 / 1 |
| Operating Temperature Range： | - 40 C to + 85 C |
| Operating Voltage： | 1.65 V to 5.5 V |
| Series： | SN74LVC2G157 |
| Factory Pack Quantity： | 3000 |
| Unit Weight： | 23.400 mg |
SN74LVC2G157DCTR相关文档
- SPICE Model: HSPICE MODEL OF SN74LVC2G157
SN74LVC2G157DCTR应用笔记
- Input and Output Characteristics of Digital Integrated Circuits
- Use of the CMOS Unbuffered Inverter in Oscillator Circuits
- CMOS Power Consumption and CPD Calculation (Rev. B)
- Understanding and Interpreting Standard-Logic Data Sheets (Rev. B)
- Texas Instruments Little Logic Application Report
- Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
- Live Insertion
- Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
- Understanding Advanced Bus-Interface Products Design Guide
- Selecting the Right Level Translation Solution (Rev. A)
- 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
- TI IBIS File Creation, Validation, and Distribution Processes
- Shelf-Life Evaluation of Lead-Free Component Finishes
- How to Select Little Logic
- Selecting the Right Texas Instruments Signal Switch
- LVC Characterization Information
- Implications of Slow or Floating CMOS Inputs (Rev. C)
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