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器件厂商PhaseLink Corporation
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图片 型号 厂商 标准 分类 描述
Image: P102-03SC P102-03SC PhaseLink Corporation low skew output buffer
Image: P102-03SCL P102-03SCL PhaseLink Corporation low skew output buffer
Image: P102-04SC P102-04SC PhaseLink Corporation low skew output buffer
Image: P102-04SCL P102-04SCL PhaseLink Corporation low skew output buffer
Image: P102-05SC P102-05SC PhaseLink Corporation low skew output buffer
Image: P102-05SCL P102-05SCL PhaseLink Corporation low skew output buffer
Image: P102-10SC P102-10SC PhaseLink Corporation low skew output buffer
Image: PLL103-01XI PLL103-01XI PhaseLink Corporation low skew buffers
Image: PLL130-05QC-R PLL130-05QC-R PhaseLink Corporation high speed translator buffer to pecl (enable low)
Image: PLL130-05QI PLL130-05QI PhaseLink Corporation high speed translator buffer to pecl (enable low)
Image: PLL130-05SI PLL130-05SI PhaseLink Corporation high speed translator buffer to pecl (enable low)
Image: PLL102-10SC PLL102-10SC PhaseLink Corporation low skew output buffer
Image: PLL102-109XI PLL102-109XI PhaseLink Corporation programmable ddr zero delay clock driver
Image: PLL102-109XM PLL102-109XM PhaseLink Corporation programmable ddr zero delay clock driver
Image: PLL500-15SC PLL500-15SC PhaseLink Corporation low phase noise vcxo (1mhz to 18mhz)
Image: PLL500-15SC-R PLL500-15SC-R PhaseLink Corporation low phase noise vcxo (1mhz to 18mhz)
Image: PLL500-15SCL PLL500-15SCL PhaseLink Corporation low phase noise vcxo (1mhz to 18mhz)
Image: PLL500-15TC-R PLL500-15TC-R PhaseLink Corporation low phase noise vcxo (1mhz to 18mhz)
Image: PLL500-15TCL PLL500-15TCL PhaseLink Corporation low phase noise vcxo (1mhz to 18mhz)
Image: PLL500-15SCL-R PLL500-15SCL-R PhaseLink Corporation low phase noise vcxo (1mhz to 18mhz)

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